Fanuc PMC ladder logic relies heavily on timers and counters to control sequencing, detect faults, and generate alarms. While their behavior is conceptually simple, misunderstandings around timer accuracy, numbering, addressing, and configuration are a common source of machine faults and nuisance alarms.

This guide serves as a technical reference for the primary Fanuc PMC timer and counter function statements, how they behave in ladder logic, and how they are typically implemented by machine tool builders.

Variable vs Fixed Timers and Counters

Fanuc PMC timers and counters fall into two primary categories:

Variable

• Preset values can be adjusted through PMC Maintenance screens
• No ladder edits are required
• Commonly used for adjustable machine timing or count thresholds

Fixed

• Preset values are hard-coded into the ladder
• Require ladder edits to change
• Typically defined by the machine builder and should not be altered casually

Before changing any value, it is critical to identify whether the timer or counter is variable or fixed.

Timer Fundamentals in Fanuc PMC

All Fanuc timers are implemented as function statements within the PMC ladder. Each timer operates using the following principles:

• An action command (ACT) contact initiates timing
• The timer output coil activates based on elapsed time
• Accuracy is influenced by ladder scan time and execution level

Timers executed earlier in the ladder (Level 1) are generally more accurate than those executed later (Level 2).

Sub 3 Timer (TMR) – Variable On-Delay Timer

The Sub 3 timer, commonly referred to as a TMR timer, is the most widely used variable timer in Fanuc PMC logic.

Key Characteristics of the Sub 3 Timer:

• Preset time is configured in PMC Maintenance under Timers
• Values are entered in milliseconds
• Output turns ON only after the full time has elapsed
• Output remains ON while the ACT signal stays high
• If ACT goes low for even one ladder scan, the timer resets

Timer Accuracy Behavior:

• Timers 1 through 8 use 48 millisecond increments
• Timers 9 and above use 8 millisecond increments
• Entered values are rounded to the nearest valid increment

For example, entering 100 milliseconds on a 48-millisecond timer results in an effective time of 96 milliseconds.

Important note: Always modify the timer number, not the timer address. Confusing these two can result in unintended machine behavior or serious faults.

Sub 24 Timer (TMRB) – Fixed On-Delay Timer

The Sub 24 timer, also known as TMRB, behaves like a standard on-delay timer but uses a fixed preset value defined in the ladder.

Key Characteristics of the Sub 24 Timer:

• Preset value cannot be modified through PMC Maintenance
• Maximum timing range is approximately 546 minutes
• Output turns ON after ACT remains high for the preset duration
• Output resets immediately if ACT goes low

Common Use Cases:

• Tool changer operation timeouts
• Builder-defined sequencing delays

These timers are rarely intended to be adjusted in the field.

Sub 77 Timer (TMRBF) – Fixed Off-Delay Timer

The Sub 77 timer, known as TMRBF, functions as an off-delay timer.

Operational Behavior:

• Output turns ON immediately when ACT goes high
• When ACT goes low, the output remains ON for the preset time
• After the delay expires, the output turns OFF

This timer type was introduced to support logic that previously required workarounds using standard on-delay timers.

Sub 54 Timer (TMRC) – Variable Timer Using Data Addresses

The Sub 54 timer, or TMRC, provides advanced flexibility by storing timing values in memory addresses rather than the timer table.

Configuration Structure:

• Line 1 defines the timer accuracy or increment level
• Line 2 specifies the data address that holds the preset value (two bytes)
• Line 3 specifies the runtime counting address (four bytes)

Example:

If the accuracy is set to 8 milliseconds and the value stored in D100 is 3000, the resulting delay is 24 seconds. This timer supports a wide range of timing values, from 8 milliseconds up to approximately 546 hours.

Important Considerations:

• The data addresses used by this timer must not be reused elsewhere
• Unlike other timers, Sub 54 does not use a timer number

Counter Fundamentals in Fanuc PMC

Counters increment or decrement each time the ACT signal transitions from low to high. Fanuc counters are ring counters, meaning that once the preset value is reached and the output turns on, the next ACT transition resets the count and restarts the process.

Sub 5 Counter (CTR) – Variable Ring Counter

The Sub 5 counter allows both preset and current values to be adjusted through PMC Maintenance screens.

Configuration Elements:

• Count origin (CNO)
• Up/Down selection
• Reset input

CNO Behavior:

• CNO low starts counting at zero
• CNO high starts counting at one

This is commonly implemented using constant signals such as:

• R9091 bit 0 (always OFF)
• R9091 bit 1 (always ON)

On newer controls, these may appear as Z91 bit equivalents.

Up/Down and Reset Inputs

Up/Down Input:

• Low configures the counter as an up-counter
• High configures the counter as a down-counter

Reset Input:

• When high for one ladder scan, resets the counter
• Commonly tied to the CNC reset signal (for example, F1.1)

Sub 56 Counter (CTRB) – Fixed Counter

The Sub 56 counter behaves similarly to the CTR counter, but it uses a fixed preset value defined in the ladder. The preset cannot be modified without editing the ladder, making this counter suitable for builder-protected logic.

Sub 55 Counter (CTRC) – Variable Counter Using Data Addresses

The Sub 55 counter, or CTRC, stores its preset value in a data address instead of using a constant.

Example:

If data address D302 contains the value 12, the counter will activate its output after 12 ACT transitions.

This counter is commonly used for:

• Tool usage tracking
• Maintenance interval logic
• Operator-adjustable count limits

Practical Applications of Timers and Counters

Typical real-world applications include:

• Lube pump on/off cycling
• Door open or close timing validation
• Indexing and rotation over-time alarms
• Tool usage and wear tracking
• Sequence completion verification

Understanding how these elements are implemented in the ladder makes it far easier to diagnose alarms and reverse-engineer faults.

Model-Specific Notes for Fanuc PMC Timers and Counters

While Fanuc PMC timers and counters behave consistently across control families, implementation details, parameter access, memory maps, and ladder organization vary by model generation. The following notes highlight practical differences that matter when troubleshooting or modifying ladder logic.

Fanuc 16 / 18 / 21 Series (Legacy Controls)

The 16/18/21 series of controls represents the transition from older tape-based logic to early digital PMC implementations.

Key Characteristics:

• PMC ladder is typically static and builder-locked
• Timer and counter ranges are more limited than modern i-Series
• RS-232 is often the only practical backup/restore method
• Sub 54 (TMRC) and Sub 55 (CTRC) may not be implemented on all machines

Timer Accuracy:

• Timers 1–8 fixed at 48 ms increments
• Timers above 8 use 8 ms increments
• Accuracy cannot be modified on most machines

Practical Notes

• Fixed timers (TMRB, TMRBF) are commonly used for tool changers
• Counters often rely on R-range addresses exclusively
• Ladder documentation is critical—search functionality is extremely limited
• Never assume modern ladder conventions apply

Fanuc 0i / 0i-Mate Series

The 0i series of controls introduced improved PMC maintenance tools while retaining compatibility with legacy logic.

Key Characteristics

• PMC Maintenance screens are more accessible
• Variable timers and counters are commonly exposed to operators
• Sub 54 timers are more frequently used for adjustable delays

Timer and Counter Behavior

• Same fundamental behavior as 16/18/21
• Improved visibility into timer and counter tables
• Accuracy settings for timers may be visible, but should not be altered unless documented

Practical Notes

• Many builders store TMRC and CTRC values in D-addresses
• Z-addresses begin to appear alongside R-addresses
• Reset signals are often tied to system F signals

Fanuc 30i / 31i / 32i Series (Modern i-Series)

The 30i/31i/32i controls use a more advanced PMC architecture with significantly more flexibility.

Key Characteristics:

• Large PMC memory space
• Extensive use of TMRC (Sub 54) and CTRC (Sub 55)
• Accuracy settings are often configurable
• Ladder is frequently layered and modular

Timer Accuracy Control

• Timer accuracy can be modified using the Accuracy softkey
• Timer increment can range from milliseconds to seconds
• Changing accuracy on pre-existing timers is dangerous and not recommended

Practical Notes:

• Data-driven timers are commonly tied to:
  • Parameters
  • Maintenance counters
  • Operator-adjustable settings
• Counters often reset automatically on mode change
• Ladder scan time is faster but more complex due to layered execution

Addressing Differences: R vs Z Addresses

Fanuc gradually transitioned from R-only addressing to Z-address support.

Common Always-On / Always-Off Constants

• Legacy:
  • R9091 bit 0 = Always OFF
  • R9091 bit 1 = Always ON
• Newer Controls:
  • Z91 bit 0 = Always OFF
  • Z91 bit 1 = Always ON

These constants are commonly used for:

• CNO inputs
• Up/Down selection
• Fixed logic states

Builder Practices That Vary by Model

Machine tool builders often change how timers and counters are used based on control generation.

Common variations include:

• Fixed timers on older controls vs variable timers on newer models
• Hard-coded counters replaced with data-driven CTRC logic
• Expanded use of reset inputs tied to system and mode signals
• Increased use of comments and symbolic ladder labels on modern controls

Never assume identical behavior between machines, even if the control series matches.

Troubleshooting by Control Generation

Older Controls (16/18/21)

Most timing issues are:

• Fixed values
• Ladder logic errors
• Cable or I/O signal delays
• Few runtime adjustment options

Mid-Generation Controls (0i)

Timing issues are often caused by:

• Incorrect PMC Maintenance edits
• Operator-changed presets
• Confusing timer numbers with addresses

Modern Controls (30i/31i/32i)

Problems frequently stem from:

• Data table corruption
• Incorrect accuracy scaling
• Misused shared memory addresses
• Ladder edits without full documentation

Final Notes

Fanuc PMC timers and counters are straightforward but unforgiving when misconfigured. Most issues arise from:

• Confusing timer or counter numbers with addresses
• Modifying fixed values unintentionally
• Reusing data addresses
• Ignoring timer accuracy increments

A disciplined approach to reading ladder logic and validating timer and counter configuration is essential for reliable machine operation – a correct understanding of control generation is often the difference between a five-minute fix and hours of downtime. Contact T.I.E. Industrial for assistance today!